Design of Protograph-LDPC-Based BICM-ID for Multi-Level-Cell (MLC) NAND Flash Memory
| Author | Bu, Yingcheng |
| Author | Fang, Yi |
| Author | Han, Guojun |
| Author | Mumtaz, Shahid |
| Author | Guizani, Mohsen |
| Available date | 2020-05-14T09:55:44Z |
| Publication Date | 2019 |
| Publication Name | IEEE Communications Letters |
| Resource | Scopus |
| ISSN | 10897798 |
| Abstract | In this letter, the optimization of protograph-low-density parity-check (LDPC)-based bit-interleaved coded modulation with iterative detection and decoding (BICM-ID) with anti-Gray mapping is investigated over multi-level-cell (MLC) NAND flash-memory channels. Since the existing protograph-based extrinsic information transfer (PEXIT) algorithm is not applicable to the BICM-ID MLC flash-memory channels, a voltage-sensing PEXIT (VS-PEXIT) algorithm is proposed to facilitate the threshold analysis of protograph codes. Exploiting the proposed VS-PEXIT algorithm, we find that the optimal AR4JA code over AWGN channels cannot preserve its superiority over BICM-ID MLC flash-memory channels. To tackle this problem, we further propose a design scheme to construct a high-rate protograph code, referred to as optimized accumulate-repeat-accumulate (OARA) code, tailored for such scenarios. Theoretical analyses and simulation results illustrate that the proposed OARA-based BICM-ID appears to be an excellent storage scheme over MLC flash-memory channels. - 2019 IEEE. |
| Sponsor | Manuscript received April 12, 2019; accepted May 1, 2019. Date of publication May 7, 2019; date of current version July 10, 2019. This work was partially supported by National Natural Science Foundation of China (Nos. 61771149, 61871136), the Open Research Fund of State Key Laboratory of Integrated Services Networks under Grant ISN19-04, the Guangdong Province Universities and Colleges Pearl River Scholar Funded Scheme under Grant 2017-ZJ022, the NSF of Guangdong Province under Grant 2016A030310337, the Research Project of the Education Department of Guangdong Province under Grants 2017KTSCX060 and 2017KZDXM028, the Graduate Education & Innovation Project of Guangdong Province (Nos. 2018XSLT13, 2018SFJD-01), the European Union�s Horizon 2020 research and innovation programme under grant agreement (No. 815178), and the Science and Technology Program of Guangzhou (No. 201904010124). The associate editor coordinating the review of this letter and approving it for publication was C. Feng. (Corresponding author: Yi Fang.) Y. Bu, Y. Fang, and G. Han are with the School of Information Engineering, Guangdong University of Technology, Guangzhou 510006, China, and also with the State Key Laboratory of Integrated Services Networks, Xidian University, Xi�an 710126, China (e-mail: yingchengbu@126.com; fangyi@gdut.edu.cn; gjhan@gdut.edu.cn). |
| Language | en |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| Subject | BICM-ID multi-level-cell NAND flash memory Protograph-based LDPC codes VS-PEXIT algorithm |
| Type | Article |
| Pagination | 1127-1131 |
| Issue Number | 7 |
| Volume Number | 23 |
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