Capacitor voltage balancing using redundant states of space vector modulation for five-level diode clamped inverters

Abstract

A redundancy balancing technique for the five-level diode-clamped inverter is presented, which balances the four dc-link capacitor voltages at high modulation index and high power factor. The technique is based on dividing the vector space of the five-level inverter into six two-level vector spaces. Dwell times are calculated as for conventional two-level space vector modulation, and the switching sequence is determined depending on the four capacitor voltages, using a redundant state method. The double Fourier series is used to theoretically determine the resultant spectral components. The proposed technique maintains link capacitor balance for high modulation indices, including over modulation, irrespective of the power factor. The proposed algorithm is validated by simulation and practically.