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AuthorHotait, H.A
AuthorMassoud, Ahmed
AuthorFinney, S. J.
AuthorWilliams, B. W.
Available date2022-03-23T07:01:12Z
Publication Date2010
Publication NameIET Power Electronics
ResourceScopus
Identifierhttp://dx.doi.org/10.1049/iet-pel.2008.0327
URIhttp://hdl.handle.net/10576/28886
AbstractA redundancy balancing technique for the five-level diode-clamped inverter is presented, which balances the four dc-link capacitor voltages at high modulation index and high power factor. The technique is based on dividing the vector space of the five-level inverter into six two-level vector spaces. Dwell times are calculated as for conventional two-level space vector modulation, and the switching sequence is determined depending on the four capacitor voltages, using a redundant state method. The double Fourier series is used to theoretically determine the resultant spectral components. The proposed technique maintains link capacitor balance for high modulation indices, including over modulation, irrespective of the power factor. The proposed algorithm is validated by simulation and practically.
Languageen
PublisherIEEE
SubjectBalancing techniques
Capacitor voltage balancing
Capacitor voltages
Dc link capacitor
Diode-clamped inverter
Double Fourier series
Dwell time
Five level inverter
High power factor
Modulation indexes
Over modulation
Power factors
Space Vector Modulation
Spectral components
Switching sequence
Algorithms
Capacitance
Capacitors
DC power transmission
Electric inverters
Electric power factor
Fourier analysis
Fourier series
Harmonic analysis
Modulation
Power converters
Vectors
Vector spaces
TitleCapacitor voltage balancing using redundant states of space vector modulation for five-level diode clamped inverters
TypeArticle
Pagination292-313
Issue Number2
Volume Number3
dc.accessType Abstract Only


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