Seven-level switched-capacitor based multilevel inverter with lesser number of power electronic components and reduced voltage stress
| Author | Sarwer, Zeeshan |
| Author | Siddique, Marif Daula |
| Author | Iqbal, Atif |
| Author | Sarwar, A. |
| Author | Rahman, K. |
| Author | Mekhilef, Saad |
| Available date | 2022-03-31T08:05:49Z |
| Publication Date | 2020 |
| Publication Name | 9th IEEE International Conference on Power Electronics, Drives and Energy Systems, PEDES 2020 |
| Resource | Scopus |
| Identifier | http://dx.doi.org/10.1109/PEDES49360.2020.9379538 |
| Abstract | This paper puts forward a seven-level switched-capacitor multilevel inverter (7L-SCMLI) with boosting features. The main features of the proposed structure are the use of reduced number of switches, lesser value of total standing voltage (TSV). Results obtained by simulation and experimental setup are displayed in the paper to validate the claim. Power loss analysis is done to estimate efficiency. The information regarding harmonic analysis and efficiency comparison is conveyed through various plots. The harmonic analysis shows a THD of 12.19% in the voltage waveform. From the plot of efficiency, the maximum efficiency can be seen near to 98%. The proposed structure of multilevel inverter has been compared with other topologies of similar level on various performance parameters and stands as a good candidate for the industrial applications. |
| Sponsor | This work was supported in part by the Qatar University-Marubeni Concept to Prototype Development Research grant # [M-CTP-CENG-2020-2] from the Qatar University. |
| Language | en |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| Subject | Nearest Level Control SCMLI Total Standing Voltage |
| Type | Conference Paper |
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Electrical Engineering [2555 items ]