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AuthorZhai, Xiaojun
AuthorBensaali, Faycal
Available date2022-12-29T07:34:46Z
Publication Date2013
Publication Name2013 7th IEEE GCC Conference and Exhibition, GCC 2013
ResourceScopus
URIhttp://dx.doi.org/10.1109/IEEEGCC.2013.6705778
URIhttp://hdl.handle.net/10576/37857
AbstractAutomatic Number Plate Recognition (ANPR) system becomes an important research topic in Intelligent Transportation systems (ITS). More recently, high-definition (HD) cameras are used for providing better performance in ANPR system. However, most known approaches for standard definition (SD) number plate localisation (NPL) are not suitable for real-time HD image processing as the real-time requirement cannot be met due to the computationally intensive cost of localising the number plate. In this paper, a solution to link previously designed architectures for NPL, character segmentation and character recognition in a SD ANPR system is first described. The system is to be implemented on a single stand-alone FPGA-based processing unit. An approach to extend the SD ANPR system to HD ANPR system without significantly increasing the computational cost is then introduced. 2013 IEEE.
Languageen
SubjectANPR
FPGA
High Dfinition Number Plate Localisation
TitleStandard definition ANPR system on FPGA and an approach to extend it to HD
TypeConference Paper
Pagination214-219
dc.accessType Abstract Only


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