Modular Multilevel Converter-Based Hvdc Transmission Systems

Abstract

High-Voltage Direct Current (HVDC) transmission systems based on Voltage Source Converter (VSC) technology has attracted significant interest recently for transmitting large amounts of power over long distances using back-to-back or point-to-point configurations. VSC-HVDC has been addressed for various HV applications such as DC interconnections, Multi-Terminal HVDC Transmission (MT-HVDC), installation of offshore wind power generation such as Europe super DC grid and installation of other renewable energy sources. Several classes of VSC topologies can be employed in HVDC systems including the conventional two and three-level converters, multilevel converters, and Modular Multilevel Converters (MMCs) that has been recently introduced and investigated for HVDC applications. MMC is penetrating the modern HVDC transmission market, due to its inherent features such as scalability, modularity, and fault ride through capability. Therefore, this thesis investigates and models a point-to-point VSC-based HVDC transmission system using nine-level MMC transient model, and 25-level MMC averaged model using MATLAB/Simulink platform to meet the requirements of HVDC systems such as HV requirements and fault ride through capability. However, a point-topoint HVDC system using conventional two-level converter is modeled and simulated using MATLAB/Simulink as a starting and benchmarking model. MMC transient model employed in this study is based on Half-Bridge Sub-Modules (HB-SMs) due to its simple structure, yet, other structures are discussed. Nevertheless, balancing of the floating capacitors is one of the challenges associated with MMCs. Therefore, capacitor voltage balancing and its modeling is addressed. Then the average model of the MMC-based HVDC system is investigated. Moreover, the behavior during DC side faults is investigated, and the employment of hybrid DC circuit breakers and Hybrid Current Limiting Circuit (HCLC) are introduced for protection and limiting the DC fault current. This introduces a platform for studying large MMC-based HVDC systems in normal operation and during faults.