A New Seven-Level Inverter Topology with Reduced Switch Number

Abstract

This paper aims to improve the power and voltage quality of a new multilevel inverter which contains a smaller number of switches in the specified voltage levels. The single phase of the proposed inverter includes 8 electronic power devices with three dc voltage sources for the seven-level waveforms. Selective harmonic elimination (SHE) technique has been used for the dominant harmonic elimination. The results of the proposed structure with traditional topologies and similar topologies show that, in terms of switch number, driver number, and the total blocking voltage, the proposed structure was superior to the previous versions. This topology is studied by simulations in the environment of PLECS.