Hardware acceleration of a dielectrophoresis system for achieving a single-neuron-per-electrode arrangement in microelectrode arrays
Author | Zhai, Xiaojun |
Author | Jaber, Fadi |
Author | Bensaali, Faycal |
Author | Mishra, Arti |
Available date | 2022-12-29T07:34:47Z |
Publication Date | 2015 |
Publication Name | International Journal of Simulation: Systems, Science and Technology |
Resource | Scopus |
Abstract | This paper describes an image processing algorithm and its efficient architecture. The proposed architecture is used to process images of microelectrode arrays (MEAs) and micro-wells captured by a microscope camera in a dielectrophoresis (DEP)-based system which consists as well of digital switches for turning the DEP force 'on' or 'off'. The images are processed in order to determine if a neuron has entered any of the micro-wells in which case the corresponding switch turns 'off' the DEP force. This process must be in real-time to avoid more than one cell to be loaded in a micro-well. The proposed architecture has been successfully implemented and tested on a Zynq SoC. Results achieved have shown that the system can process one image in 9 ms which meets the minimum real-time requirements of this DEP system. 2015, UK Simulation Society. All rights reserved. |
Language | en |
Publisher | UK Simulation Society |
Subject | Dielectrophoresis FPGA Microelectrode arrays Zynq SoC |
Type | Article |
Pagination | 4.1-4.7 |
Issue Number | 3 |
Volume Number | 16 |
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