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AuthorSiddique, Marif Daula
AuthorReddy, B. Prathap
AuthorMeraj, Mohammad
AuthorIqbal, Atif
Available date2023-05-21T08:32:44Z
Publication Date2022
Publication NameInternational Journal of Circuit Theory and Applications
ResourceScopus
URIhttp://dx.doi.org/10.1002/cta.3280
URIhttp://hdl.handle.net/10576/43090
AbstractThe requirement of a boosting aspect for the power electronic converter is essential for the fuel cell, solar PV, and battery-based applications as the generated voltage is of low voltage magnitude. In these low-voltage applications, a new boost inverter topology has been suggested, where the power conversion will happen in a single-stage instead of two-stage (dc-dc converter + two-level inverter). The proposed topology consists of 11 power semiconductor devices, one switched capacitor unit, and two dc voltage sources that are arranged in the magnitude of 1:3. This arrangement is able to achieve an output voltage of 15 levels with a boosting factor of 1.75. The other advantages of the designed topology have been the reduced device count with the self-balancing of capacitor voltage and improved efficiency with better power loss sharing among the switches. By accumulating additional switched-capacitor units to the proposed basic structure, the proposed inverter can be extended to support a greater number of levels and a higher voltage gain. A comprehensive assessment has been accomplished with single-source and dual-source topologies, and the proposed topology shows the improved design. A low-power laboratory porotype has been used to endorse the proposed topology with real-time conditions. 2022 John Wiley & Sons, Ltd.
SponsorThis publication was made possible by Qatar University-Marubeni Concept to Prototype Development Research grant no. [M-CTP-CENG-2020-2] from the Qatar University. The statements made herein are solely the responsibility of the authors.
Languageen
PublisherJohn Wiley and Sons Ltd
Subjecthigh-level topology
multilevel inverter
single-stage power conversion
TitleA new high-level boost inverter topology with reduced device count
TypeArticle
Pagination2777-2792
Issue Number8
Volume Number50


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