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    Design of a controlled solid state device for fault current limitation and arc flash suppression

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    Date
    2017
    Author
    Alsalemi, S.
    Almadhoun, S.
    Najad, M.
    Massoud, A. M.
    Soliman, R.
    Metadata
    Show full item record
    Abstract
    This paper presents a solution to High Fault Current (HFC) in low voltage distribution systems by surveying different types of Fault Current Limiter (FCL) devices, shedding light on Solid State FCL (SSFCL) particularly the single-phase full bridge inverter type. Regarding the inverter functionality, it offers two alternatives of HFC reduction. One is achieved by introducing a virtual impedance to the system, whereas the other applies a sufficient amount of voltage at the instant of fault. Accordingly, the rms fault detection technique and the three-consecutive current readings are chosen together to achieve a reliable fault detection. Furthermore, the arc flash problem is investigated in terms of High Impedance Fault (HIF) and HFC, focusing mainly on resolving the arc flash caused by HFC through utilizing the SSFCL. A single phase SSFCL full bridge inverter-based is prototyped and tested in the lab. Experimental results are provided to substantiate the presented concept. 1 2017 IEEE.
    DOI/handle
    http://dx.doi.org/10.1109/ISCAIE.2017.8074948
    http://hdl.handle.net/10576/16419
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    • Electrical Engineering [‎2840‎ items ]

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