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AuthorZhai, Xiaojun
AuthorJaber, Fadi
AuthorBensaali, Faycal
AuthorMishra, Arti
Available date2021-07-05T10:58:30Z
Publication Date2016
Publication NameProceedings - UKSim-AMSS 17th International Conference on Computer Modelling and Simulation, UKSim 2015
ResourceScopus
URIhttp://dx.doi.org/10.1109/UKSim.2015.28
URIhttp://hdl.handle.net/10576/21077
AbstractThis paper describes an image processing algorithm and its efficient architecture. The proposed architecture is used to process images of microelectrode arrays (MEAs) and micro-wells captured by a microscope camera in a dielectrophoresis (DEP)-based system which consists as well of digital switches for turning the DEP force 'on' or 'off'. The images are processed in order to determine if a neuron has entered any of the micro-wells in which case the corresponding switch turns 'off' the DEP force. This process must be in real-time to avoid more than one cell to be loaded in a micro-well. The proposed architecture has been successfully implemented and tested on a Zynq SoC. Results achieved have shown that the system can process one image in 9 ms which meets the minimum real-time requirements of this DEP system. 2015 IEEE.
Languageen
PublisherInstitute of Electrical and Electronics Engineers Inc.
SubjectDielectrophoresis
FPGA
microelectrode arrays
Zynq SoC
TitleHardware Acceleration of an Image Processing System for Dielectrophoretic Loading of Single Neurons Inside Micro-Wells of Microelectrode Arrays
TypeConference Paper
Pagination571-576


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