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    An improved asymmetrical multi-level inverter topology with boosted output voltage and reduced components count

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    IET Power Electronics - 2021 - Arif - An improved asymmetrical multi‐level inverter topology with boosted output voltage.pdf (3.640Mb)
    Date
    2021
    Author
    Bin Arif, M Saad
    Mustafa, Uvais
    Siddique, Marif Daula
    Ahmad, Shahbaz
    Iqbal, Atif
    Ashique, Ratil Hasnat
    Ayob, Shahrin bin
    ...show more authors ...show less authors
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    Abstract
    This paper presents an improved Multi-level Inverter topology utilizing the concept of boosting-capacitor and two DC sources with reduced switches count for generating 17-level output. The topology employs 10 unidirectional switches including one bidirectional switch. Comparison with other recent topologies shows that the proposed topology employs a reduced number of devices and better performance. The topology combines the modularity of H-Bridge with the boosting capacity of the switched capacitor topology. Special care is taken while designing the switching strategy for voltage balancing of the capacitors. The authors also have generalized the topology to produce 'n' level output. Relevant expressions are also formed and reported. Experimental validation, as well as simulation, is performed, and results are verified. Nearest level control is used as the modulation technique.
    DOI/handle
    http://dx.doi.org/10.1049/pel2.12119
    http://hdl.handle.net/10576/27611
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    • Electrical Engineering [‎2821‎ items ]

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