Show simple item record

AuthorZhai, Xiaojun
AuthorBensaali, Faycal
AuthorSotudeh, Reza
Available date2022-12-29T07:34:47Z
Publication Date2013
Publication NameIET Circuits, Devices and Systems
ResourceScopus
URIhttp://dx.doi.org/10.1049/iet-cds.2012.0339
URIhttp://hdl.handle.net/10576/37859
AbstractThe last main stage in an automatic number plate recognition system (ANPRs) is optical character recognition (OCR), where the number plate characters on the number plate image are converted into encoded texts. In this study, an artificial neural network-based OCR algorithm for ANPR application and its efficient architecture are presented. The proposed architecture has been successfully implemented and tested using the Mentor Graphics RC240 field programmable gate arrays (FPGA) development board equipped with a 4M Gates Xilinx Virtex-4 LX40. A database of 3570 UK binary character images have been used for testing the performance of the proposed architecture. Results achieved have shown that the proposed architecture can meet the real-time requirement of an ANPR system and can process a character image in 0.7 ms with 97.3% successful character recognition rate and consumes only 23% of the available area in the used FPGA. The Institution of Engineering and Technology 2013.
Languageen
SubjectAutomatic Number Plate Recognition systems
Character images
Efficient architecture
Mentor Graphics
OCR algorithms
Optical character recognition (OCR)
Proposed architectures
Real time requirement
Field programmable gate arrays (FPGA)
Neural networks
Signal receivers
Optical character recognition
TitleReal-time optical character recognition on field programmable gate array for automatic number plate recognition system
TypeArticle
Pagination337-344
Issue Number6
Volume Number7
dc.accessType Abstract Only


Files in this item

FilesSizeFormatView

There are no files associated with this item.

This item appears in the following Collection(s)

Show simple item record