Hardware acceleration of a dielectrophoresis system for achieving a single-neuron-per-electrode arrangement in microelectrode arrays
المؤلف | Zhai, Xiaojun |
المؤلف | Jaber, Fadi |
المؤلف | Bensaali, Faycal |
المؤلف | Mishra, Arti |
تاريخ الإتاحة | 2022-12-29T07:34:47Z |
تاريخ النشر | 2015 |
اسم المنشور | International Journal of Simulation: Systems, Science and Technology |
المصدر | Scopus |
الملخص | This paper describes an image processing algorithm and its efficient architecture. The proposed architecture is used to process images of microelectrode arrays (MEAs) and micro-wells captured by a microscope camera in a dielectrophoresis (DEP)-based system which consists as well of digital switches for turning the DEP force 'on' or 'off'. The images are processed in order to determine if a neuron has entered any of the micro-wells in which case the corresponding switch turns 'off' the DEP force. This process must be in real-time to avoid more than one cell to be loaded in a micro-well. The proposed architecture has been successfully implemented and tested on a Zynq SoC. Results achieved have shown that the system can process one image in 9 ms which meets the minimum real-time requirements of this DEP system. 2015, UK Simulation Society. All rights reserved. |
اللغة | en |
الناشر | UK Simulation Society |
الموضوع | Dielectrophoresis FPGA Microelectrode arrays Zynq SoC |
النوع | Article |
الصفحات | 4.1-4.7 |
رقم العدد | 3 |
رقم المجلد | 16 |
الملفات في هذه التسجيلة
الملفات | الحجم | الصيغة | العرض |
---|---|---|---|
لا توجد ملفات لها صلة بهذه التسجيلة. |
هذه التسجيلة تظهر في المجموعات التالية
-
الهندسة الكهربائية [2649 items ]