Seven-level switched-capacitor based multilevel inverter with lesser number of power electronic components and reduced voltage stress

Abstract

This paper puts forward a seven-level switched-capacitor multilevel inverter (7L-SCMLI) with boosting features. The main features of the proposed structure are the use of reduced number of switches, lesser value of total standing voltage (TSV). Results obtained by simulation and experimental setup are displayed in the paper to validate the claim. Power loss analysis is done to estimate efficiency. The information regarding harmonic analysis and efficiency comparison is conveyed through various plots. The harmonic analysis shows a THD of 12.19% in the voltage waveform. From the plot of efficiency, the maximum efficiency can be seen near to 98%. The proposed structure of multilevel inverter has been compared with other topologies of similar level on various performance parameters and stands as a good candidate for the industrial applications.