Harmonics minimization in 3-level inverter waveform and its FPGA realization

Abstract

The multilevel inverter (MLI) is more preferred for medium voltage high power application as it produces better quality voltage waveforms (stepped in nature) with reduced harmonic distortion (less THD), operates at less switching frequency and impress low voltage and current stress on the switching devices. A low switching frequency modulation techniques known as selective harmonics elimination (SHE) PWM based on pre-computed switching patterns further improves the operation. In this paper a level waveform with low switching frequency Pulse width modulation (PWM) has been proposed. The output waveform is in compliance with the specific grid codes with minimum filter requirement. A modified Newton Raphson (NR) technique is proposed in this paper to compute all the possible solutions of the highly non linear and transcendental equations in whole range of modulation (operation). The mathematical equations of harmonics minimization is derived while considering elimination of non-triplen lower order harmonics from the output waveform. A case study for nine switching angles in a quarter periods is carried out to evaluate all the possible switching instants. An FPGA based hardware realization is also made to practically validate the computed switching angles.