A simplified methodology for mitigating the harmonics and common-mode voltage using multi-level inverters for renewable energy applications
Author | Sengamalai, Usha |
Author | Ramasamy, Palanisamy |
Author | Thentral, Thamizh |
Author | Balasubramani, Karthikeyan |
Author | Alagarsamy, Manjunathan |
Author | Muthusamy, Suresh |
Author | Panchal, Hitesh |
Author | Sachithanandam, Mayurappriyan Pudupalayam |
Author | Sadasivuni, Kishor Kumar |
Available date | 2022-03-23T06:35:49Z |
Publication Date | 2021 |
Publication Name | Energy Sources, Part A: Recovery, Utilization and Environmental Effects |
Resource | Scopus |
Identifier | http://dx.doi.org/10.1080/15567036.2021.1980157 |
Abstract | Multi-level inverters have outstanding construction, making it feasible to achieve high voltage levels with less THD value. These harmonics can be mitigated by decreasing the number of voltage switches and DC links in the modified cascaded H-bridge multi-level inverter. This research deals with the novel 15-level inverter and reducing the number of power switches. The proposed work consists of three simulation circuits, one with 10 switches and the second with 12 switches. The mitigation of harmonics, voltage stress, and common-mode voltage is achieved with the help of modifying the pulses of the switches in the proposed 10 switches topology. Additionally, a filter is applied at the terminal to reduce the overall THD value for variable AC load applications. The multi-level inverter can generate the high-level output with less harmonics, losses, and common-mode voltage with the help of low switching frequencies. These types of a multi-level inverters are used in renewable energy applications. Finally, the simulation of a 15-level novel inverter is carried out with the help of MATLAB/Simulink software and compared with the conventional cascaded H-bridge multi-level inverter. The total harmonics distortion for modified CHBMI with 12 switches with or without filter and modified CHBMI with 10 switches with or without are mitigated as 13.53, 6.91, 12.86, and 4.56, respectively, compared to the conventional method with 28 switches. The proposed method is implemented in the hardware to validate the simulated results of the proposed topology. |
Language | en |
Publisher | Taylor and Francis Ltd. |
Subject | Cascaded H bridge common-mode voltage multi-level inverter pulse width modulation total harmonic distortion voltage stress |
Type | Article |
Files in this item
Files | Size | Format | View |
---|---|---|---|
There are no files associated with this item. |
This item appears in the following Collection(s)
-
Center for Advanced Materials Research [1351 items ]