HLS based hardware acceleration on the zynq SoC: A case study for fall detection system
البيانات الوصفيةعرض كامل للتسجيلة
Fall detection is a major problem in healthcare systems, especially for elderly people who are the most vulnerable. It is important to design and implement not only an accurate fall detection system (FDS) but also a system with a real-time response. The achievement of high accuracy and fast response time together allows the development of a system that helps saving lives, time and money in healthcare industry. This paper presents the design, simulation and implementation of a novel FDS using the Shimmer wearable sensor. The discrete wavelet transform (DWT) is applied for preprocessing the data coming from the Shimmer platform, principal component analysis (PCA) is used for dimensionality reduction and feature extraction and finally, a binary decision tree (DT) is utilized for classification purpose. The system is simulated in MATLAB prior to the implementation on the Zynq system-on-chip (SoC) for hardware acceleration. DWT is executed on the processing system (PS) of the Zynq platform in a software manner while PCA and DT are both implemented on the programmable logic (PL) for hardware acceleration. PCA and DT are developed in C and synthesized in Vivado high level synthesis (HLS) tool to transform the C based designed into a register transfer level (RTL) implementation. Various optimization techniques are explored in Vivado HLS. The performance of the FDS in terms of accuracy of the classifier is 88.4% while the overall resources used in PL of the Zynq vary between 2% and 23% depending on the running frequency and optimization technique used.